FT232H

The sixth generation of fixed-function D2xx devices. This is essentially half of an FT2232H with some improvements.

The base device is FT232H. However, just like FT2232H, it also has two USB-PD variants:

• FT233HP: two USB-PD ports
• FT232HP: one USB-PD port (actually identical to FT233HP with the extra port unbonded)

Both USB-PD variants are the same silicon (which is distinct from the "base" FT232H silicon).

Features:

• is a high-speed USB 2.0 peripherial
  • integrated D+ pullup resistor
• single-channel D2xx device
• can be configured to one of several supported modes:
  • FT232R-like UART mode (default)
  • FT245R-like FIFO mode (selected in EEPROM)
  • FT2232H-like synchronous FIFO mode (dynamically selected variant of FIFO mode)
  • FT2232D-like CPU FIFO mode (selected in EEPROM)
  • FT2xxB-like async bitbang mode (dynamically selected)
  • FT2232C-like sync bitbang mode (dynamically selected)
  • FT232R-like CBUS bitbang mode (dynamically selected, but has to be pre-configured in EEPROM)
  • FT2232C-like MPSSE mode (dynamically selected)
  • FT2232C-like fast opto-isolated serial mode (selected in EEPROM)
  • new FT1248 mode (selected in EEPROM)
• 1kiB IN FIFO and 1kiB out FIFO
• 120MHz internal base clock, generated from 12MHz crystal or external oscillator
• internal 5V to 3.3V
• internal 5V/3.3V to 1.8V LDO
• 1.8V VCORE power supply for internal logic from internal LDO
• 3.3V VCCIO power supply for business-end IO
• 3.3V VPHY power supply for USB PHY
• 3.3V separate AGND and VPLL power supply for PHY PLL
• internal power-on reset circuit
• required external support circuitry:
  • precision resistor for PHY current reference
  • decoupling capacitor for internal LDO
  • 12MHz crystal or oscillator
  • optionally, a 93LC56 (128×16-bit) or 93LC66 (256×16-bit) EEPROM

For USB-PD devices, the USB-PD function is described on the USB-PD page.

The full list of devices is:

Pinout — base device

Pinout — USB-PD devices

Pin functions per mode

Note: the function of the pins labeled with square brackets is determined by the configuration in EEPROM when the relevant mode is active.

CBUS pins

The device has 10 CBUS pins. They can be configured through the EEPROM to do the following functions:

TODO: valid pin set far from certain.

Note that the EEPROM-configured CBUS pin function may be overriden by whatever mode is currently active.

EEPROM data format

The device will accept 128-word and 256-word EEPROMs. In case of 256-word EEPROMs, only first half is covered by the checksum. The other half can still be used to store user data.

Note that 64-word EEPROMs are not supported for unknown reasons. This may be related to the funny fixed word at address 0x45. Since this is in the same address range as the FT232R uses for factory-programmed data, it is somewhat likely that it is an accidental bit of leftover FT232R circuitry.

The EEPROM format is:

• word 0x00:
  • bits 0-3: mode
    • 0: UART
    • 1: 245-style FIFO
    • 2: CPUFIFO
    • 4: opto-isolated
    • 8: FT1248
  • bit 4: enable bind to VCP driver
    • 0: low
  • bit 9: FT1248 bit order
    • 0: MSB first
    • 1: LSB first
  • bit 10: FT1248 flow control enable
    • TODO: the polarity of this bit is not clear, it might be a disable
  • bit 15: enable PWRSAV# function on ACBUS7
• word 0x01: idVendor (USB VID)
• word 0x02: idProduct (USB PID)
• word 0x03: bcdDevice (see table)
• word 0x04: USB config (goes straight to configuration descriptor)
  • bits 0-7: bmAttributes
    • bit 5: remote wakeup enabled
    • bit 6: self-powered
    • bit 7: always set to 1
  • bits 8-15: bMaxPower (max power in units of 2mA)
• word 0x05: device control
  • bit 2: IO pulldown in suspend
  • bit 3: serial number enabled
• word 0x06:
  • bits 0-1: ADBUS drive strength
    • 0: 4mA
    • 1: 8mA
    • 2: 12mA
    • 3: 16mA
  • bit 2: ADBUS slow slew rate
  • bit 3: ADBUS schmitt trigger
  • bits 4-5: ACBUS drive strength
  • bit 6: ACBUS slow slew rate
  • bit 7: ACBUS schmitt trigger
• word 0x07: manufacturer string pointer
• word 0x08: product description string pointer
• word 0x09: serial number string pointer
• word 0x0a: always 0
• word 0x0b: always 0
• word 0x0c:
  • bits 0-3: CBUS0 function (see table above)
  • bits 4-7: CBUS1 function
  • bits 8-11: CBUS2 function
  • bits 12-15: CBUS3 function
• word 0x0d:
  • bits 0-3: CBUS4 function
  • bits 4-7: CBUS5 function
  • bits 8-11: CBUS6 function
  • bits 12-15: CBUS7 function (lol has to be 0?)
• word 0x0e:
  • bits 0-3: CBUS8 function
  • bits 4-7: CBUS9 function
• word 0x0f: EEPROM type
  • 0x56: 93LC56 (128-word)
  • 0x66: 93LC66 (256-word)
• words 0x10..0x40: user area
  • word 0x2e: set to 0x302 by default (concidentally or not, this corresponds to a header of an empty string descriptor)
• words 0x40..0x50: reserved area for unclear reason (stuff copied over from FT232R?)
  • word 0x45: always set to 0x48
• words 0x50..0x7f: string / user area
• word 0x7f: checksum

String pointers are formatted as follows:

• bits 0-7: pointer to descriptor within EEPROM (counted in bytes); note that FTDI tools will only store string descriptors in the area starting at word 0x50, ensuring the high bit is always set
• bits 8-15: total length of descriptor in bytes

TODO: figure out wtf it is with the always-set high bit

The string descriptors are stored in ROM with the descriptor header included, as follows:

• word 0: header
  • bits 0-7: total length of descriptor in bytes (includes header)
  • bits 8-15: descriptor type (always 3 — string)
• words 1 and up: string in UTF-16

The checksum can be computed as follows:

#![allow(unused)]
fn main() {
fn checksum(eeprom: &[u16]) -> u16 {
    let mut res: u16 = 0xaaaa;
    for pos in 0..0x7f { // checksum word is NOT included — we're calculating it
        res ^= eeprom[pos];
        res = res.rotate_left(1);
    }
    res
}
}